A schematic of four bits in various on/off states. The bit is made up of phase-change material (PCM) with a size of about 10 nanometers with carbon nanotube electrodes. The programming current is 100 times lower than the present state-of-the-art memory. Image courtesy Eric Pop.
Technophiles who have been dreaming of mobile devices that run longer on lighter, slimmer batteries may soon find their wish has been granted.
University of Illinois engineers have developed a form of ultra-low-power digital memory that is faster and uses 100 times less energy than similar available memory. The technology could give future portable devices much longer battery life between charges.
Led by ECE Assistant Professor Eric Pop, the team will publish its results in an upcoming issue of Science magazine and online in the March 10 Science Express.
“I think anyone who is dealing with a lot of chargers and plugging things in every night can relate to wanting a cell phone or laptop whose batteries can last for weeks or months,” said Pop, who is also affiliated with the Beckman Institute for Advanced Science and Technology at Illinois.
The flash memory used in mobile devices today stores bits as charge, which requires high programming voltages and is relatively slow. Industry has been exploring faster, but higher power phase-change materials (PCM) as an alternative. In PCM memory a bit is stored in the resistance of the material, which is switchable.
Pop’s group lowered the power per bit to 100 times less than existing PCM memory by focusing on one simple, yet key factor: size.
Rather than the metal wires standard in industry, the group used carbon nanotubes, tiny tubes only a few nanometers in diameter—10,000 times smaller than a human hair.
“The energy consumption is essentially scaled with the volume of the memory bit,” said ECE graduate student Feng Xiong, the first author of the paper. “By using nanoscale contacts, we are able to achieve much smaller power consumption.”
To create a bit, the researchers place a small amount of PCM in a nanoscale gap formed in the middle of a carbon nanotube. They can switch the bit “on” and “off” by passing small currents through the nanotube.
“Carbon nanotubes are the smallest known electronic conductors,” Pop said. “They are better than any metal at delivering a little jolt of electricity to zap the PCM bit.”
Nanotubes also boast an extraordinary stability, as they are not susceptible to the degradation that can plague metal wires. In addition, the PCM that functions as the actual bit is immune to accidental erasure from a passing scanner or magnet.
The low-power PCM bits could be used in existing devices with a significant increase in battery life. Right now, a smart phone uses about a watt of energy and a laptop runs on more than 25 watts. Some of that energy goes to the display, but an increasing percentage is dedicated to memory.
“Anytime you’re running an app, or storing MP3s, or streaming videos, it’s draining the battery,” said ECE graduate student Albert Liao, a co-author. “The memory and the processor are working hard retrieving data. As people use their phones to place calls less and use them for computing more, improving the data storage and retrieval operations is important.”
Pop believes that, along with improvements in display technology, the nanotube PCM memory could increase any smartphone energy efficiency so it could run for a longer time on a smaller battery, or even to the point where it could run simply by harvesting its own thermal, mechanical or solar energy—no battery required.
And device junkies will not be the only beneficiaries.
“We’re not just talking about lightening our pockets or purses,” Pop said. “This is also important for anything that has to operate on a battery, such as satellites, telecommunications equipment in remote locations, or any number of scientific and military applications.”
In addition, ultra-low-power memory could cut the energy consumption—and thus the expense—of data storage or supercomputing centers by a large percentage. The low-power memory could also enable three-dimensional integration, a stacking of chips that has eluded researchers because of fabrication and heat problems.
The team has made and tested a few hundred bits so far, and they want to scale up production to create arrays of memory bits that operate together. They also hope to achieve greater data density through clever programming such that each physical PCM bit can program two data bits, called multibit memory.
The team is continuing to work to reduce power consumption and increase energy efficiency even beyond the groundbreaking savings they’ve already demonstrated.
“Even though we’ve taken one technology and shown that it can be improved by a factor of 100, we have not yet reached what is physically possible. We have not even tested the limits yet. I think we could lower power by at least another factor of 10,” Pop said.
The work was supported in part by the Marco Focus Center Research Program, a Semiconductor Research Corporation entity, and by the Office of Naval Research. Graduate student David Estrada was also a co-author.
Three parallel memory bits with carbon nanotube electrodes (false color image based on topographic profile from atomic force microscopy). The middle bit is in the 'off' state, the other two are 'on.' The silicon dioxide substrate is shown in blue. Image courtesy Eric Pop.
Led by electrical and computer engineering professor Eric Pop, left, a team of researchers have developed a form of ultra-low-power digital memory that is faster and uses 100 times less energy than similar available memory. Team members: back row, from middle, David Estrada and Albert Liao; front, Feng Xiong. Photo by L. Brian Stauffer.
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